1. Field of the Invention
The prevented invention relates to a liquid crystal display panel and a driving method thereof, especially relates to a liquid crystal display panel and its driving method, which improves the data signal providing way for the data lines and further compensates the parasitic capacitor effect.
2. Description of the Related Art
With the wide applications of liquid crystal display (LCD) panels, users have more and more demands about the quality of the LCD panel, such as high brightness, high contrast, high resolution, high color saturation and fast response time. Especially as the panel size increases, the LCD panels have generally been applied to household flat displays, such as liquid crystal (LC) TV sets, which have become an important application of the LCD panels. Most of the general, traditional LCD panels have narrow view angles, so the normal images displayed by them only can be viewed directly in front of the display area. If users watch the display area from an oblique view angle, color distortion occurs in what they watch, and even gray inversion occurs. That is, what appears black is actually white and what appears white is actually black. Therefore, how to widen the view angle is an important subject for the LCD manufacturers.
Among various methods for widening the view angle, an LC Vertical Alignment (VA) technique is still one of the most popular techniques in the current LCD market. However, because liquid crystal molecules are aligned in the same direction (mono-domain vertical alignment), we also cannot see a normal image from the view angle perpendicular to or symmetric to the direction. No matter when the liquid crystal molecules are realigned in a different direction after the electrical field existing therein changes, the view angle is also limited to the parallel direction of the liquid crystal molecules. Therefore, a multi-domain VA technique was set forth to improve the drawback of the prior art, hence the quality of various view angles is assured. Japanese Fujitsu Corporation once tried to form ridges or bumps on the color filter, and use the oblique boundary generated by bumps to control the alignment of the tilt direction of liquid crystal molecules automatically align tilt direction according to where region their belong to. But because the existence of the bumps results in that the precise alignment between a color filter and an active matrix substrate is necessary, the yield of this LCD panel becomes worse and the cost thereof increases.
FIG. 1 is a cross-sectional diagram of a conventional LCD display panel with a bias-bending vertical alignment (BBVA) type. The LCD panel 10 comprises a color filter 11, a liquid crystal layer 12 and an active matrix substrate 13. The color filter 11 and active matrix substrate 13 have a transparent substrate 111 and 131 respectively. A main electric field exists between the common electrode 112 formed on the color filter 11 and the pixel electrode 134 formed on the active matrix substrate 13, and a pair of symmetrically oblique electric fields exists between a control electrode 133 and the pixel electrode 134 together formed on the active matrix substrate 13 to make liquid crystal molecules 121 have oblique positions. There is another insulation layer 132 interposed between the control electrode 133 and the pixel electrode 134.
But when VCE<Vcom<VP is satisfied, a declination line is brought into existence in the center of an area A, wherein VCE, Vcom and VP represent the potentials of the control electrode, common electrode and pixel electrode respectively. The existence of the declination line results in that the liquid crystal layer 12 has a lower transmission ratio, a longer response time and an unstable status. In order to avoid the occurrence of these negative phenomena, it is expected that the following criteria should be satisfied during polarity inversion:    Criterion 1: If the current pixel is a positive frame, then VCE>VP>Vcom; and    Criterion 2: If the current pixel is a negative frame, then VCE<VP<Vcom.FIG. 2 is an equivalent circuit diagram of a pixel proposed by Korean Samsung Electronics Cooperation. The circuit of pixel 20 can satisfy aforesaid two criteria to eliminate declination lines. However, because each of the pixels 20 includes three thin film transistors, if one of the thin film transistors is damaged, the pixel is considered to be malfunctioning. Therefore, the manufacture yield of this LCD cannot meet an acceptable standard currently. On the other hand, the number of the thin film transistors connected to a same scanning line is too much so as to result in a severe RC delay on the scanning signal.
To improve the problems of the above-mentioned various wide view angle LCD devices, the application inventors have provided a kind of wide view angle LCD device set forth in US 2005/0083279. FIG. 3 is an equivalent circuit diagram of a pixel of this kind wide view angle LCD device. Only four adjacent pixels are shown in FIG. 3, which are formed by scanning lines 361, 362 and 363 (representing Gm−2, Gm−1 and Gm respectively) crossing data lines 351, 352 and 353 (representing Dn−2, Dn−1 and Dn respectively). Each pixel includes a first thin film transistor T1, a second thin film transistor T2, a control electrode 34 and a pixel electrode 33 for the pixel at the intersection of the data line 353 and scanning line 363. The first electrode of the first thin film T1, is connected to a data line 353, the second electrode of it is connected to the pixel electrode 33, and the gate electrode of it is connected to a scanning line 363. The first electrode of the second thin film transistor T2 is connected to another adjacent data line 352, the second electrode of it is connected to the control electrode 34, and the gate electrode of it is connected to another adjacent scanning line 362. In the pixel configuration, a liquid crystal capacitor C1 is constituted between the pixel electrode 33 and a common electrode 37, a bias-bending capacitor C2 is constituted between the control electrode 34 and the pixel electrode 33, and further a capacitor C3 is constituted between the control electrode 34 and the common electrode 37.
Taking the pixel B which is at the intersection of the data line Dn and the scanning line Gm for example, the pixel B is controlled via its left and right side data lines 352 and 353 as well as its up and down side scanning lines 362 and 363. During the pixel operating process, the scanning signal of each scanning line during two adjacent horizontal scanning periods or a vertical scanning period includes a waveform which can make corresponding voltage to be written into the control electrode 34 or the pixel electrode 33, and a coupled voltage is induced on the control electrode 34 due to the potential variation of the pixel electrode 33 during the next horizontal scanning period. Through the above pixel configuration as well as the pixel operating method, when the polarity of the pixel is positive, Criterion 1 VCE>VP>Vcom is satisfied; and after a vertical scanning period terminating, while the polarity of the pixel changes to negative, Criterion 2 VCE<VP<Vcom is also satisfied accordingly. As FIG. 3 is shown, each pixel only comprises two thin film transistors (T1 and T2), therefore, the manufacture yield of this LCD and the pixel aperture ratio can be increased. On the other hand, since the number of the thin film transistors connected to a same scanning line is decreased, the RC delay problem of the scanning signal is improved.
However, as the pixel configuration of FIG. 3 shows, each pixel is controlled via its two adjacent data lines (the left and right side data lines) as well as its two adjacent scanning lines (the up and down side scanning lines), that is, each pixel must be electrically coupled to two data lines and two scanning lines. In other words, as a full pixel matrix is concerned, if a pixel matrix comprises n pixel columns and m pixel rows (i.e. a n×m pixel matrix) as shown in FIG. 4, the pixel matrix 400 will need n+1 data lines (D1˜Dn+1) and m+1 scanning lines (G1˜Gm+1) to drive each pixel thereof. That is to say, there must be two data lines, the first data line D1 and the n+1 th data line Dn+1, respectively existing in the most left and right outsides of the pixel matrix 400, and two scanning lines, the first scanning line G1 and the m+1 th scanning line Gm+1, respectively existing in the most up and down outsides of the pixel matrix 400. Nevertheless, as a n×m pixel matrix of a traditional panel is concerned, if each pixel in the traditional panel only has one thin film transistor, it generally needs only n data lines and m scanning lines to drive the pixels, therefore, a traditional source driver and a gate driver which can respectively provide n data signals for the n data lines and m scanning signals for the m scanning lines are usually employed.
However, since the pixel matrix 400 in FIG. 4 has n+1 data lines and m+1 scanning lines, it particularly needs to be associated with a source driver and a gate driver which can respectively provide n+1 data signals for the n+1 data lines and m+1 scanning signals for the m+1 scanning lines. In other words, the traditional source and gate drivers which can only respectively provide n data signals and m scanning signals can be no more employed, and a new designed source driver and a gate driver are currently needed. Taking the 1024×768 XGV panel for example, the traditional source driver employed in the panel only provides 1024 data signals, nevertheless, if the pixel matrix configuration of a XGV panel is designed as that in FIG. 4, a source driver which can provide 1025 data signals will be needed. However, as we known, to redesign a driver, especially a source driver, causes a lot of cost. Therefore, due to the above mentions, it is needed to provide an improved liquid crystal display panel and a driving method thereof according to the pixel matrix 400 being in FIG. 4 to resolve the aforesaid problems.